Current and emerging applications from the data center to the network edge demand high performance and high efficiency hardware implementations. Some emerging problems are too challenging to implement with conventional von Neumann CPU architectures.
At the same time, hardware security has been thrust into the spotlight across the industry, with high-profile vulnerabilities being publicized on a regular basis. All of this has led to a renaissance in semiconductor development, with companies creating new architectures, new design practices, and new technologies to address performance, efficiency, and security concerns.
Galois’s semiconductor design efforts are at the forefront of this renaissance. Our active areas of research include:
- Low power and energy efficient computation, including ultra-low energy (<1W) machine learning SoCs and edge-compute devices;
- Efficient radiation tolerant ASICs, with performance, area, power and energy efficiency that is much closer to their non-radiation-tolerant variants than using traditional radiation hardening design techniques;
- High-speed formally assured cryptography, hardening cryptographic circuits against side channel attacks, HW trojan detection and mitigation;
- Secure Systems-on-Chip, including secure boot and hardware roots of trust; and
- EDA security analysis tool suites to analyze security properties of hardware processors.
Our team combines 20 years of experience in computer security and assurance using formal methods with decades of state-of-the-art semiconductor design experience. Members of our hardware team have previously worked on commercial chips in 14nm FinFET, TSMC 28nm, and GlobalFoundries 22FDX and 12LP processes.
Our current projects include two systems-on-chip scheduled for fabrication in the GlobalFoundries 12LP process in 2020. Galois’s hardware expertise spans computer architecture, RTL design, FPGAs, custom EDA tools and CAD algorithms, automated PnR flows in modern process nodes, pre- and post-silicon testing and verification, low-power circuit and system design, and ASIC fabrication.