Tom is a Hardware Research Engineer at Galois.
Tom has an extensive electronics and electrical background in circuit board manufacturing and automation industries, as well as 23 years expertise in R&D in the ASIC IP industry, with emphasis in delivery of high-quality IP. He spent most of his time in the ASIC IP industry architecting and developing highly configurable IP at Synopsys, as well as helping develop and integrate all of the tool flows into quality deliverable IP environments, with an emphasis on usability and Clock Doman Crossing correctness.
Since 2003, Tom has been working on his own AI and data analysis algorithms for fun and personal investment purposes.
Tom attended RIT for a period of time and received a B.S. in Electronics Engineering from Oregon Institute of Technology.